(1) Field of the Invention
The present invention relates to a semiconductor device in which a CMOS logic section and a plurality of DRAM sections used for different applications are formed together on the same semiconductor substrate, and more particularly relates to a DRAM-embedded system LSI having a reduced power consumption and an increased processing speed while ensuring a sufficient signal holding characteristic.
(2) Description of Related Art
In recent years, DRAM-embedded system LSI (large scale integrated) chips have been attracting public attention. In a DRAM-embedded system LSI chip, a CMOS (complementary metal oxide semiconductor) logic section and a general-purpose DRAM (dynamic random access memory) section as a memory device, which used to be formed on separate chips, are formed together on the same chip to satisfy a demand for diversified semiconductor devices (see Japanese Unexamined Patent Publication No. 2000-232076).
For example, a DRAM-embedded system LSI chip used for an image processing application, or the like, includes a DRAM section as a memory device for storing an image information signal, and a CMOS logic section for retrieving necessary information from the DRAM section and performing an arithmetic operation based on the retrieved information, and the DRAM section and the CMOS logic section are formed together on the same chip.
A DRAM-embedded system LSI chip as described above realizes a higher communication speed than that realized by older techniques where data or information is exchanged between a CMOS logic section and a DRAM section that are formed on separate chips. A semiconductor device in which a CMOS logic section and a plurality of DRAM sections are formed together on the same chip includes, for example, a CMOS logic section formed on a silicon substrate and a DRAM section including trench capacitors or stacked capacitors. In this relation, the trench capacitors represent cell capacitors (memory cell capacitors) of a particular type formed in the silicon substrate, and the stacked capacitors represent cell capacitors of a particular type formed on the silicon substrate.
It was technically difficult to form a CMOS logic section and a DRAM section together on the same chip because they had large areas. However, with recent miniaturization techniques, a DRAM-embedded system LSI chip having a chip size less than or equal to 100 mm2 has been realized. Now, a plurality of CMOS logic sections and a plurality of application-specific DRAM sections are formed on the same chip, whereas a single chip accommodated only one CMOS logic section and one application-specific DRAM section with older techniques.